RM0365 Datasheet, PDF (137/1076 Pages) STMicroelectronics – This reference manual targets application developers

Flexible memory controller (FMC)
RM0365
transfers at even addresses: nCE1 will be asserted low, NCE2 will be asserted high
and only the even bytes will be valid.
• Accesses to I/O space can be either 8-bit or 16 bit AHB accesses.
Table 50. 16-bit PC-Card signals and access type
Space
Access type
Allowed/not
Allowed
1 0 1 0 1 X X X-X X _Common Read/Write byte on D7-D0
0 1 1 0 1 X X X-X X Memory Read/Write byte on D15-D8
0 0 1 0 1 X X X-X 0
Space _{Read/Write word on D15-D0}
X 0 0 0 1 0 1 X-X 0
X 0 0 0 1 0 0 X-X 0
Attribute
Space
Read or Write Configuration
Registers
Read or Write CIS (Card
Information Structure)
1 0 0 0 1 X X X-X 1
0 1 0 0 1 X X X-X x
Attribute
Space
Invalid Read or Write (odd
address)
Invalid Read or Write (odd
address)
1 0 0 1 0 X X X-X 0
Read Even Byte on D7-0
1 0 0 1 0 X X X-X 1
Read Odd Byte on D7-0
1 0 0 1 0 X X X-X 0
Write Even Byte on D7-0
1 0 0 1 0 X X X-X 1
Write Odd Byte on D7-0
I/O space
0 0 0 1 0 X X X-X 0
Read Word on D15-0
0 0 0 1 0 X X X-X 0
Write word on D15-0
0 1 0 1 0 X X X-X X
Read Odd Byte on D15-8
0 1 0 1 0 X X X-X X
Write Odd Byte on D15-8
YES
Not supported
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
Not supported
Not supported
FMC Bank 4 gives access to those 3 memory spaces as described in Section 7.4.2: NAND
Flash memory/PC Card address mapping and Table 17: NAND/PC Card memory mapping
and timing registers.
Wait feature
The CompactFlash or PC Card may request the FMC to extend the length of the access
phase programmed by MEMWAITx/ATTWAITx/IOWAITx bits, asserting the nWAIT signal
after nOE/nWE or nIORD/nIOWR activation if the wait feature is enabled through the
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