RM0365 Datasheet, PDF (104/1076 Pages) STMicroelectronics – This reference manual targets application developers

RM0365
Flexible memory controller (FMC)
Bit
number
31:30
29-28
27-24
23-20
19-16
15-8
7-4
3-0
Table 29. FMC_BWTRx bit fields
Bit name
Value to set
Reserved
ACCMOD
DATLAT
CLKDIV
BUSTURN
DATAST
ADDHLD
ADDSET
0x0
0x0
Don’t care
Don’t care
Time between NEx high to NEx low (BUSTURN HCLK)
Duration of the second access phase (DATAST HCLK cycles) for write
accesses.
Don’t care
Duration of the first access phase (ADDSET HCLK cycles) for write
accesses.
Minimum value for ADDSET is 0.
Mode 2/B - NOR Flash
Figure 14. Mode2 and mode B read access waveforms
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