LAN91C111 Datasheet, PDF (66/142 Pages) SMSC Corporation – 10/100 Non-PCI Ethernet Single Chip MAC + PHY

10/100 Non-PCI Ethernet Single Chip MAC + PHY
Datasheet
LOW
BYTE
ADDRESS 0
0
0
0
0
0
0
0
0
HIGH
BYTE
ADDRESS 1
0
0
0
0
0
0
0
0
LOW
BYTE
ADDRESS 2
0
0
0
0
0
0
0
0
HIGH
BYTE
ADDRESS 3
0
0
0
0
0
0
0
0
LOW
BYTE
ADDRESS 4
0
0
0
0
0
0
0
0
HIGH
BYTE
ADDRESS 5
0
0
0
0
0
0
0
0
8.14 Bank 1 - General Purpose Register
OFFSET
A
NAME
GENERAL PURPOSE
REGISTER
TYPE
READ/WRITE
SYMBOL
GPR
HIGH
BYTE
HIGH DATA BYTE
0
0
0
0
0
0
0
0
LOW
BYTE
LOW DATA BYTE
0
0
0
0
0
0
0
0
This register can be used as a way of storing and retrieving non-volatile information in the EEPROM
to be used by the software driver. The storage is word oriented, and the EEPROM word address to
be read or written is specified using the six lowest bits of the Pointer Register.
This register can also be used to sequentially program the Individual Address area of the EEPROM,
that is normally protected from accidental Store operations.
This register will be used for EEPROM read and write only when the EEPROM SELECT bit in the
Control Register is set. This allows generic EEPROM read and write routines that do not affect the
basic setup of the LAN91C111.
Revision 1.8 (07-13-05)
66
DATASHEET
SMSC LAN91C111-REV B