LAN91C111 Datasheet, PDF (53/142 Pages) SMSC Corporation – 10/100 Non-PCI Ethernet Single Chip MAC + PHY

10/100 Non-PCI Ethernet Single Chip MAC + PHY
Datasheet
Chapter 8 MAC Data Structures and Registers
8.1
Frame Format In Buffer Memory
The frame format in memory is similar for the Transmit and Receive areas. The first word is reserved
for the status word. The next word is used to specify the total number of bytes, and it is followed by
the data area. The data area holds the frame itself. By default, the last byte in the receive frame format
is followed by the CRC, and the Control byte follows the CRC.
bit15
RAM
OFFSET
2nd Byte
(DECIMAL)
0
2
RESERVED
4
bit0
1st Byte
STATUS WORD
BYTE COUNT (always even)
DATA AREA
2046 Max
CRC (4 BYTES)
CONTROL BYTE
Last Byte
LAST DATA BYTE (if odd)
Figure 8.1 Data Frame Format
STATUS WORD
BYTE COUNT
DATA AREA
CONTROL BYTE
TRANSMIT PACKET
RECEIVE PACKET
Written by CSMA upon transmit
completion (see Status Register)
Written by CSMA upon receive
completion (see RX Frame Status
Word)
Written by CPU
Written by CSMA
Written/modified by CPU
Written by CSMA
Written by CPU to control odd/even Written by CSMA; also has odd/even
data bytes
bit
BYTE COUNT - Divided by two, it defines the total number of words including the STATUS WORD,
the BYTE COUNT WORD, the DATA AREA, the CRC, and the CONTROL BYTE. The CRC is not
included if the STRIP_CRC bit is set. The maximum number of bytes in a RAM page is 2048 bytes.
SMSC LAN91C111-REV B
53
DATASHEET
Revision 1.8 (07-13-05)