LAN91C111 Datasheet, PDF (132/142 Pages) SMSC Corporation – 10/100 Non-PCI Ethernet Single Chip MAC + PHY

PARAMETER
t8
A1-A15, AEN, nBE[3:0] Setup to nADS Rising
t9
A1-A15, AEN, nBE[3:0] Hold After nADS Rising
t10
nCYCLE Setup to LCLK Rising
t11
nCYCLE Hold after LCLK Rising (Non-Burst Mode)
t16
W/nR Setup to nCYCLE Active
t20
Data Hold from LCLK Rising (Read)
t21
nSRDY Delay from LCLK Rising
t23
nRDYRTN Setup to LCLK Rising
t24
nRDYRTN Hold after LCLK Rising
10/100 Non-PCI Ethernet Single Chip MAC + PHY
Datasheet
MIN TYP MAX UNITS
8
ns
5
ns
5
ns
3
ns
0
ns
4
ns
7
ns
3
ns
3
ns
TXD0-TXD3
TXEN100
RXD0-RXD3
RX25
RX_DV
RX_ER
t27
t27
t28
t28
t28
t29
t29
Figure 14.10 MII Timing
PARAMETER
t27 TXD0-TXD3, TXEN100 Delay from TX25 Rising
t28 RXD0-RXD3, RX_DV, RX_ER Setup to RX25 Rising
t29 RXD0-RXD3, RX_DV, RX_ER Hold After RX25 Rising
MIN TYP MAX UNITS
0
15
ns
10
ns
10
ns
Revision 1.8 (07-13-05)
132
DATASHEET
SMSC LAN91C111-REV B