LAN83C185 Datasheet, PDF (28/61 Pages) SMSC Corporation – HIGH PERFORMANCE SINGLE CHIP LOW POWER 10/100 ETHERNET PHYSICAL LAYER TRANSCEIVER

Chapter 5 Registers
Table 5.1 Control Register: Register 0 (Basic)
15
14
13
12
11
10
9
8
7
6543210
Reset Loopback Speed Select A/N Enable Power Down Isolate Restart A/N Duplex Mode Collision Test
Reserved
15
14
100Base- 100Base-
T4
TX
Full Duplex
13
100Base-
TX
Half
Duplex
12
10Base-T
Full
Duplex
Table 5.2 Status Register: Register 1 (Basic)
11
10
10Base-T
Half
Duplex
9
8
7
Reserved
6
5
4
3
2
1
0
A/N
Remote A/N Link Jabber Extended
Complete Fault Ability Status Detect Capability
Table 5.3 PHY ID 1 Register: Register 2 (Extended)
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
PHY ID Number (Bits 3-18 of the Organizationally Unique Identifier - OUI)
Table 5.4 PHY ID 2 Register: Register 3 (Extended)
15
14
13
12
11
10
9
8
7
6
5
4
PHY ID Number (Bits 19-24 of the Organizationally Unique
Identifier - OUI)
Manufacturer Model Number
3
2
1
0
Manufacturer Revision Number
Table 5.5 Auto-Negotiation Advertisement: Register 4 (Extended)
15
Next
Page
14
13
12
Reserved Remote Reserved
Fault
11
Symmetric
Pause
Operation
10
Asymmetric
Pause
Operation
9
8
100Base-T4 100Base-TX
Full Duplex
7
100Base-
TX
6
10Base-T
Full
Duplex
5
10Base-T
43210
IEEE 802.3 Selector Field