LAN9221_12 Datasheet, PDF (151/151 Pages) SMSC Corporation – High-Performance 16-bit Non-PCI 10/100 Ethernet Controller with Variable Voltage I/O

High-Performance 16-bit Non-PCI 10/100 Ethernet Controller with Variable Voltage I/O
Datasheet
Table 9.1 Customer Revision History (continued)
REVISION LEVEL & DATE
Rev. 2.3
(08-18-08)
Rev. 2.2
(06-19-08)
Rev. 2.2
(06-10-08)
Rev. 2.1
(05-13-08)
Rev. 1.92
(10-22-07)
SECTION/FIGURE/ENTRY
Note 7.9 on page 145
Figure 1.2, "Internal Block
Diagram"
Table 2.4, “System and
Power Signals,” on page 18
Auto-negotiation
Advertisement on page 120
Auto-negotiation
Advertisement on page 120
Section 3.5, "Wake-up
Frame Detection," on
page 26 and Section 5.4.1,
"MAC_CR—MAC Control
Register," on page 106
Section 5.4.12,
"WUCSR—Wake-up Control
and Status Register," on
page 115
Section 3.6.1.1, "RX
Checksum Calculation," on
page 32
Section 2.2, “External Pull-
Up/Pull-Down Resistors
Section 1.1, "Block
Diagram"
Chapter 2 Pin Description
and Configurationon
page 15
EECLK pin description in
Chapter 2 Pin Description
and Configurationon
page 15
CORRECTION
Note following I/O Buffer Characteristics table
modified:
Changed from: ".....the per-pin input leakage is 10
divided by the maximum input leakage current."
to: ".....the per-pin input leakage is the maximum
input leakage current divided by 10."
Diagram redone.
The word “Core” was added to the regulator block
title.
Changed VDD_CORE/VDD18CORE bulk
capacitor value from 10uF to 4.7uF.
Bits 9 and 15 relabeled as Reserved, Read-Only
(RO), with a default of 0.
Fixed definition of bits 11:10 when equal to “11” by
adding “advertise support for..” to beginning of
definition. Also added note stating “When both
symmetric PAUSE and asymmetric PAUSE
support are advertised, the device will only be
configured to, at most, one of the two settings
upon auto-negotiation completion.”
Added note: “When wake-up frame detection is
enabled via the WUEN bit of the WUCSR—Wake-
up Control and Status Register, a broadcast wake-
up frame will wake-up the device despite the state
of the Disable Broadcast Frame (BCAST) bit in the
MAC_CR—MAC Control Register.”
Fixed typo in bit 9: “... Mac Address [1:0] bit set to
0.” was changed to “...Mac Address [0] bit set to 0.”
“checksum = [B0, B1] + C0 + [B2, B3] + C1 + …
+ [0, BN] + CN-1” changed to “checksum = [B1,
B0] + C0 + [B3, B2] + C1 + … + [0, BN] + CN-1”
Added section. Added references to this section
throughout the pin description tables as applicable.
Removed the system memory block and arrow
above the microprocessor/ microcontroller
Pin assignment information re-organized into
separate table.
Note added to EECLK pin description to indicate
proper usage.
SMSC LAN9221/LAN9221i
151
DATASHEET
Revision 2.9 (03-01-12)