LAN9221_12 Datasheet, PDF (145/151 Pages) SMSC Corporation – High-Performance 16-bit Non-PCI 10/100 Ethernet Controller with Variable Voltage I/O

High-Performance 16-bit Non-PCI 10/100 Ethernet Controller with Variable Voltage I/O
Datasheet
Table 7.8 I/O Buffer Characteristics VDDVARIO=1.8V +/- 10%
PARAMETER
SYMBOL
MIN
VIS Type Input Buffer
Low Input Level
High Input Level
Negative-Going Threshold
Positive-Going Threshold
Schmitt Trigger Hysteresis
(V_{IHT -} V_ILT)
Input Leakage
(V_IN = VSS or VDDVARIO)
Input Leakage
(V_IN = 5.25V)
Input Capacitance
VO12 Type Buffer
Low Output Level
High Output Level
VOD12 Type Buffer
Low Output Level
VOD8 Type Buffer
Low Output Level
VO8 Type Buffer
Low Output Level
High Output Level
ICLK Input Buffer
Low Input Level
High Input Level
V_ILI
V_IHI
V_ILT
V_IHT
V_HYS
I_IH
I_IH
C_IN
V_OL
V_OH
V_OL
V_OL
V_OL
V_OH
V_ILCK
V_IHCK
-0.3
0.54
0.878
277
-10
VDDVARIO - 0.4
VDDVARIO - 0.4
-0.3
1.4
TYP
0.69
1.06
368
MAX
5.25
0.83
1.24
525
+10
120
2.5
0.4
0.4
0.4
0.4
0.5
3.6
UNITS
NOTES
V
V
V
Schmitt Trigger
V
Schmitt Trigger
mV
uA
Note 7.8
uA
Note 7.8, Note 7.9
pF
V
I_OL = 4mA
V
I_OH = -4mA
V
I_OL = 4mA
V
I_OL = 3mA
V
I_OL = 3mA
V
I_OH = -3mA
V
V
Note 7.8
This specification applies to all inputs and tri-stated bi-directional pins. Internal pull-down
and pull-up resistors add +/- 50uA per-pin (typical). When operating at reduced VDDVARIO
voltage levels (less than 3.0V), do not rely on internal pull-up and pull-down resistors to
determine signal state. Refer to the individual signal descriptions in Chapter 2, Pin
Description and Configuration for more information.
Note 7.9
This is the total V_IN input leakage for the entire device. This value should be divided by
the number of pins driven to V_IN MAX to calculate per-pin leakage. For example, if 10 pins
are driven to the maximum operational limit for V_IN (5.5V or 5.25V, dependant on
VDDVARIO), the per-pin input leakage is the maximum input leakage current divided by
10.
SMSC LAN9221/LAN9221i
145
DATASHEET
Revision 2.9 (03-01-12)