SI53360 Datasheet, PDF (7/15 Pages) Silicon Laboratories – 1:8 LOW JITTER CMOS CLOCK BUFFER WITH 2:1 INPUT MUX

Si53360
2.3. Output Clock Termination Options
The recommended output clock termination options are shown below. Unused output clocks should be left floating.
Si533xx
CMOS Driver
Zout
Rs
Zo
50
CMOS
Receivers
Note: Rs = 33  for 3.3 V and 2.5 V operation.
Rs = 0  for 1.8 V operation.
Figure 2. LVCMOS Output Termination
2.4. AC Timing Waveforms
T_PHL
T_SK
CLK
VPP/2
Q_N
VPP/2
Q
VPP/2
Q_M
VPP/2
T_PLH
Propagation Delay
T_SK
Output-Output Skew
T_F
Q
Q _{80% VPP}
20% VPP
80% VPP
20% VPP
T_R
Rise/Fall Time
Figure 3. AC Waveforms
Rev. 1.1
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