SI53360 Datasheet, PDF (1/15 Pages) Silicon Laboratories – 1:8 LOW JITTER CMOS CLOCK BUFFER WITH 2:1 INPUT MUX

Si53360
1:8 LOW JITTER CMOS CLOCK BUFFER
WITH 2:1 INPUT MUX (<200 MHZ)
Features
 8 LVCMOS outputs
 Low additive jitter: 150 fs rms typ
 Wide-frequency range:
dc to 200 MHz
 2:1 input MUX
 Asynchronous output enable
 Low output-output skew: 40 ps typ
 RoHs compliant, Pb-free
 Industrial temperature range:
–40 to +85 °C
 Footprint-compatible with ICS552-02
 1.8, 2.5, or 3.3 V operation
 16-TSSOP
Applications
 High-speed clock distribution
 Ethernet switch/router
 Optical Transport Network (OTN)
 SONET/SDH
 PCI Express Gen 1/2/3
 Storage
 Telecom
 Industrial
 Servers
 Backplane clock distribution
Description
The Si53360 is an ultra low jitter eight output LVCMOS buffer. The Si53360
features a 2:1 input mux, making it ideal for redundant clocking applications. The
Si53360 utilizes Silicon Laboratories’ advanced CMOS technology to fanout
clocks from dc to 200 MHz with guaranteed low additive jitter, low skew, and low
propagation delay variability. The Si53360 supports operation over the industrial
temperature range and can be operated from a 1.8 V, 2.5 V, or 3.3 V supply.
Functional Block Diagram
Ordering Information:
See page 10.
Pin Assignments
OE ¹
VDD 2
Q0 3
Q1 4
Q2 5
16 _{CLK_SEL}
15 _VDD
14 _Q7
13 Q6
12 Q5
Q3 6
11 _Q4
Power
VDD
Supply
Q0
Filtering
Q1
GND 7
CLK0 8
10 _GND
9 _CLK1
Q2
CLK0
0
Q3
Patents pending
Q4
CLK1
1
Q5
CLK_SEL
Q6
Q7
GND
OE
Rev. 1.1 8/15
Copyright © 2015 by Silicon Laboratories
Si53360