SI53360 Datasheet, PDF (14/15 Pages) Silicon Laboratories – 1:8 LOW JITTER CMOS CLOCK BUFFER WITH 2:1 INPUT MUX

Si53360
DOCUMENT CHANGE LIST
Revision 0.4 to Revision 1.0
 Updated Table 2, “Input Clock Specifications,” on
page 3.
 Updated Table 3, “DC Common Characteristics,” on
page 3.
 Added Table 4, “Output Characteristics—LVCMOS,”
on page 3.
 Updated Table 10, “Package Dimensions,” on
page 11 to include improved data for additive jitter
specifications.
 Updated output voltage specifications
 Improved performance specifications with more
detail.
 Added pin type description to the pin descriptions
table.
Revision 1.0 to Revision 1.1
 Updated Table 9, “Si53360 Pin Description*,” on
page 8.
14
Rev. 1.1