SI53019-A01A Datasheet, PDF (7/37 Pages) Silicon Laboratories – 19-OUTPUT PCIE GEN 3 BUFFER

Si53019-A01A
Table 3. SMBus Characteristics
Parameter
SMBus Input Low Voltage¹
SMBus Input High Voltage¹
SMBus Output Low Voltage¹
Nominal Bus Voltage¹
SMBus sink Current¹
SCLK/SDAT Rise Time¹
SCLK/SDAT Fall Time¹
SMBus Operating Frequency^1,2
Symbol
V_ILSMB
V_IHSMB
V_OLSMB
V_DDSMB
I_PULLUP
t_RSMB
t_FSMB
f_MINSMB
Test Condition
@ I_PULLUP
@ V_OL
3 V to 5 V +/–10%
(Max V_IL – 0.15) to (Min V_IH + 0.15)
(Min V_IH + 0.15) to (Max V_IL – 0.15)
Minimum Operating Frequency
Notes:
1. Guaranteed by design and characterization.
2. The differential input clock must be running for the SMBus to be active.
Min Max Unit
—
0.8
V
2.1 V_DDSMB V
—
0.4
V
2.7
5.5
V
4
—
mA
—
1000
ns
—
300
ns
—
100 kHz
Table 4. Current Consumption
T_A = 0–70 °C; supply voltage V_DD = 3.3 V ±5%
Parameter
Symbol
Operating Current IDD_VDD
Power Down Current IDD_VDDPD
Test Condition
100 MHz, CL = Full Load, Rs=33 
All differential pairs tri-stated
Min Typ Max Unit
—
310 350 mA
—
6
15
mA
Rev. 1.3
7