SI53019-A01A Datasheet, PDF (22/37 Pages) Silicon Laboratories – 19-OUTPUT PCIE GEN 3 BUFFER

Si53019-A01A
4.2. Block Read/Write
4.2.1. Block Read
After the slave address is sent with the R/W condition bit set, the command byte is sent with the MSB = 0. The
slave acknowledges the register index in the command byte. The master sends a repeat start function. After the
slave acknowledges this, the slave sends the number of bytes it wants to transfer (>0 and <33). The master
acknowledges each byte except the last and sends a stop function.
1
7
11
8
11
7
11
T Slave
Wr A Command Code _A r _Slave
Rd A
Command
starT
Condition
8
1
Data Byte A
Register # to
read
2 x 7 bit = 1
repeat starT
Acknowledge
8
1
8
11
Data Byte 0 A Data Byte 1 N P
Master to
Slave to
Block Read Protocol
Not acknowledge
stoP Condition
Figure 10. Block Read Protocol
4.2.2. Block Write
After the slave address is sent with the R/W condition bit not set, the command byte is sent with the MSB = 0. The
lower seven bits indicate the register at which to start the transfer. If the command byte is 00h, the slave device will
be compatible with existing block mode slave devices. The next byte of a write must be the count of bytes that the
master will transfer to the slave device. The byte count must be greater than zero and less than 33. Following this
byte are the data bytes to be transferred to the slave device. The slave device always acknowledges each byte
received. The transfer is terminated after the slave sends the ACK and the master sends a stop function.
1
7
11
8
1
T Slave Address ^Wr A ^Command A
Master to
Slave to
Command bit
starT
Condition
Register # to
write
2 x 7 bit = 0
Acknowledge
8
1
8
1
8
11
Byte Count = 2 A Data Byte 0 A Data Byte 1 A P
Block Write Protocol
stoP Condition
Figure 11. Block Write Protocol
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Rev. 1.3