SI8261AAC-C-IS Datasheet, PDF (6/40 Pages) Silicon Laboratories – 5 KV LED EMULATOR INPUT, 4.0 A ISOLATED GATE DRIVERS

Si826x
Table 2. Electrical Characteristics (Continued)¹
V_DD = 15 V or 30 V, GND = 0 V, I_F = 6 mA, T_A = –40 to +125 °C; typical specs at 25 °C
Parameter
Symbol
UVLO Threshold +
(Si826xxBx mode)
VDD_UV+
UVLO Threshold –
(Si826xxBx mode)
VDD_UV–
UVLO lockout hysteresis
(Si826xxBx mode)
UVLO Threshold +
(Si826xxCx mode)
VDD_HYS
VDD_UV+
UVLO Threshold –
(Si826xxCx mode)
VDD_UV–
UVLO lockout hysteresis
(Si826xxCx mode)
VDD_HYS
AC Switching Parameters
Input noise filter cut-off pulse
width
Minimum pulse width
Propagation delay (Low-to-High)
Propagation delay (High-to-Low)
Pulse Width Distortion
Propagation Delay Difference⁵
t_NFC
t_PMIN
t_PLH
t_PHL
PWD
PDD
Rise time
Fall time
Device Startup Time
Common Mode
Transient Immunity
t_R
t_F
t_START
CMTI
Test Condition
See Figure 12 on page 16.
V_DD rising
See Figure 12 on page 16.
V_DD falling
See Figure 13 on page 16.
V_DD rising
See Figure 13 on page 16.
V_DD falling
C_L = 200 pF
C_L = 200 pF
|t_PLH – t_PHL|
t_PHLMAX – t_PLHMIN
C_L = 200 pF
C_L = 200 pF
Output = low or high
(V_CM = 1500 V), (I_F > 6 mA)
(See Figure 4)
Min Typ Max Unit
7.5
8.4
9.4
V
6.9
7.9
8.9
V
—
500
— mV
10.5
12
13.5
V
9.4 10.7 12.2 V
—
1.3
—
V
—
—
15
ns
—
30
—
ns
20
40
60
ns
10
30
50
ns
—
17
28
ns
-1
—
25
ns
—
5.5
15
ns
—
8.5
20
ns
—
16
30
µs
35
50
— kV/µs
Notes:
1. See "8.Ordering Guide" on page 23 for more information.
2. Minimum value of (V_DD - GND) decoupling capacitor is 1 µF.
3. Both V_O pins are required to be shorted together for 4.0 A compliance.
4. When performing this test, it is recommended that the DUT be soldered down to the PCB to reduce parasitic
inductances, which may cause over-stress conditions due to excessive ringing.
5. Guaranteed by characterization.
6
Rev. 1.3