SI8261AAC-C-IS Datasheet, PDF (15/40 Pages) Silicon Laboratories – 5 KV LED EMULATOR INPUT, 4.0 A ISOLATED GATE DRIVERS

Si826x
4. Technical Description
4.1. Device Behavior
Truth tables for the Si826x are summarized in Table 10.
Table 10. Si826x Truth Table Summary*
Input
V_DD
V_O
OFF
> UVLO
LOW
OFF
< UVLO
LOW
ON
> UVLO
HIGH
ON
< UVLO
LOW
*Note: This truth table assumes VDD is powered. If VDD is below UVLO, see "4.3.Under Voltage
Lockout (UVLO)" on page 16 for more information.
4.2. Device Startup
Output V_O is held low during power-up until V_DD rises above the UVLO+ threshold for a minimum time period of
t_START. Following this, the output is high when the current flowing from anode to cathode is > I_F(ON). Device startup,
normal operation, and shutdown behavior is shown in Figure 10.
UVLO+
UVLO-
V_DDHYS
V_DD
I_F(ON)
I_F
I_HYS
t_START
t_PHL
t_PLH
t_START
V_O
Figure 10. Si826x Operating Behavior (I_F > I_F(MIN) when V_F > V_F(MIN))
Rev. 1.3
15