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SI8261AAC-C-IS Datasheet, PDF (21/40 Pages) Silicon Laboratories – 5 KV LED EMULATOR INPUT, 4.0 A ISOLATED GATE DRIVERS
6. Pin Descriptions (SOIC-8, DIP8, LGA8)
Si826x
NC 1
UVLO
ANODE 2
e
CATHODE 3
8 VDD
7 VO
6 VO
NC 4
5 GND
SOIC-8, DIP8, LGA8
Industry Standard Pinout
Figure 19. Pin Configuration
Table 11. Pin Descriptions (SOIC-8, DIP8, LGA8)
Pin Name
Description
1
NC* No connect.
2
ANODE Anode of LED emulator. VO follows the signal applied to this input with respect to the
CATHODE input.
3 CATHODE Cathode of LED emulator. VO follows the signal applied to ANODE with respect to this input.
4
NC* No connect.
5
GND External MOSFET source connection and ground reference for VDD. This terminal is typically
connected to ground but may be tied to a negative or positive voltage.
6
VO
Output signal. Both VO pins are required to be shorted together for 4.0 A compliance.
7
VO
Output signal. Both VO pins are required to be shorted together for 4.0 A compliance.
8
VDD Output-side power supply input referenced to GND (30 V max).
*Note: No Connect. These pins are not internally connected. To maximize CMTI performance, these pins should be
connected to the ground plane.
Rev. 1.3
21