SI8261AAC-C-IS Datasheet, PDF (5/40 Pages) Silicon Laboratories – 5 KV LED EMULATOR INPUT, 4.0 A ISOLATED GATE DRIVERS

Si826x
Table 2. Electrical Characteristics (Continued)¹
V_DD = 15 V or 30 V, GND = 0 V, I_F = 6 mA, T_A = –40 to +125 °C; typical specs at 25 °C
Parameter
Symbol
Test Condition
Min Typ Max
Output High Current (Source)^3,4
I_OH
Si826xAxx devices (I_F = 0),
(t_{PW_IOH} < 250 ns)
—
0.4
—
(see Figure 3)
Si826xBxx devices (I_F = 0),
(t_{PW_IOH} < 250 ns),
(V_DD – V_O = 7.5 V)
0.5
1.8
—
(see Figure 3)
Output Low Current (Sink)^3,4
I_OL
Si826xAxx devices
(I_F = 10 mA),
(t_{PW_IOL} < 250 ns)
(see Figure 2)
Si826xBxx devices
(I_F = 10 mA),
(t_{PW_IOL} < 250 ns),
(V_O - GND = 4.2 V)
(see Figure 2)
—
0.6
—
1.2
4.0
—
High-Level Output Voltage
Low-Level Output Voltage
UVLO Threshold +
(Si826xxAx mode)
UVLO Threshold –
(Si826xxAx mode)
UVLO lockout hysteresis
(Si826xxAx mode)
V_OH
V_OL
VDD_UV+
VDD_UV–
VDD_HYS
Si826xAxx devices
(I _OUT = –100 mA)
Si826xBxx devices
(I _OUT = –100 mA)
Si826xBxx devices
(I _OUT = 0 mA),
(I_F = 0 mA)
Si826xAxx devices
(I _OUT = 100 mA),
(I_F = 10 mA)
Si826xBxx devices
(I _OUT = 100 mA),
(I_F = 10 mA)
See Figure 11 on page 16.
V_DD rising
See Figure 11 on page 16.
V_DD falling
—
V_DD–
0.4
—
V_DD– V_DD–
0.5 0.25
—
—
V_DD
—
—
320
—
—
80
200
5
5.6
6.3
4.7
5.3
6.0
—
300
—
Notes:
1. See "8.Ordering Guide" on page 23 for more information.
2. Minimum value of (V_DD - GND) decoupling capacitor is 1 µF.
3. Both V_O pins are required to be shorted together for 4.0 A compliance.
4. When performing this test, it is recommended that the DUT be soldered down to the PCB to reduce parasitic
inductances, which may cause over-stress conditions due to excessive ringing.
5. Guaranteed by characterization.
Unit
A
A
V
mV
V
V
mV
Rev. 1.3
5