SI5334 Datasheet, PDF (6/37 Pages) Silicon Laboratories – PIN-CONTROLLED ANY-FREQUENCY, ANY-OUTPUT QUAD CLOCK GENERATOR

Si5334
Table 3. Performance Characteristics (Continued)
(V_DD = 1.8 V –5% to +10%, 2.5 V ±10%, or 3.3 V ±10%, T_A = –40 to 85 °C)
Parameter
Spread Spectrum PP
Frequency Deviation
Symbol
Test Condition
Min
SS_DEV Clock frequency of 100 MHz⁴ —
Typ
–0.5
Max
—
Spread Spectrum Modulation
SS_DEV Clock frequency of 100 MHz 30
—
33
Rate
Notes:
1. Outputs at integer-related frequencies and using the same driver format.
2. Keep MultiSynth output frequency between 5 MHz to Fvco/8.
3. Only MultiSynth0 can have frequency inc/dec but MultiSynth0 can be routed to any output.
4. Spread spectrum is only available on clock outputs that are at 100 MHz and have the Rn divider set to 1.
Unit
%
kHz
Table 4. Input and Output Clock Characteristics
(V_DD = 1.8 V –5% to +10%, 2.5 V ±10%, or 3.3 V ±10%, T_A = –40 to 85 °C)
Parameter
Symbol
Test Condition
Min
Input Clock (AC Coupled Differential Input Clocks on Pins IN1/2, IN5/6)¹
Typ
Max
Frequency
f_IN
5
Differential Voltage
Swing
V_PP
710 MHz input
0.4
Rise/Fall Time²
t_R/t_F
20%–80%
—
Duty Cycle
DC
< 1 ns tr/tf
40
Input Impedance¹
R_IN
10
Input Capacitance
C_IN
—
Input Clock (DC-coupled Single-Ended Input Clock on Pins IN3/4)
—
710
—
2.4
—
1.0
—
60
—
—
3.5
—
Frequency
f_IN
Input Voltage
V_I
Input Voltage Swing
Rise/Fall Time³
t_R/t_F
Rise/Fall Time³
t_R/t_F
Duty Cycle
DC
CMOS
200 MHz
10%–90%
20%–80%
< 2 ns tr/tf
5
—
200
–0.1
—
3.73
0.8
—
V_DD + 10%
—
—
4
—
—
2.3
40
—
60
Input Capacitance
C_IN
Output Clocks (Differential)
—
2.0
—
Notes:
1. Use an external 100  resistor to provide load termination for a differential clock.
See "2.2. Crystal/Clock Input" on page 15.
2. For best jitter performance, keep the input slew rate on IN1/2, IN5/6 faster than 0.3 V/ns.
3. For best jitter performance, keep the input single ended slew rate on pins 3 or 4 faster than 1 V/ns.
4. Only two unique frequencies above Fvco/8 can be simultaneously output, Fvco/4 and Fvco/6.
5. CML output format requires ac-coupling of the differential outputs to a differential 100  load at the receiver.
6. Includes effect of internal series 22  resistor.
Units
MHz
V_PP
ns
%
k
pF
MHz
V_PP
V_PP
ns
ns
%
pF
6
Rev. 1.2