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ISL28023 Datasheet, PDF (28/55 Pages) Intersil Corporation – Bidirectional current sensing
ISL28023
AUXP
AUXP is the auxiliary shunt voltage monitor positive input pin.
The pin connects to the most positive voltage of the auxiliary
current shunt resistor. The voltage range for the pin is from 0V to
VCC. The maximum measurable voltage differential between
AUXP and AUXM is 80mV.
AUXM
AUXM is the auxiliary shunt voltage monitor negative input pin.
The pin connects to the most negative voltage of the auxiliary
current shunt resistor. The voltage range for the pin is from 0V to
VCC. The maximum measurable voltage differential between
AUXP and AUXM is 80mV.
VCC
VCC is the positive supply voltage pin. VCC is an analog power
pin. VCC supplies power to the device. The allowable voltage
range is from 3V to 5.5V.
I2CVCC
I2CVCC is the positive supply voltage pin. I2CVCC is an analog
power pin. I2CVCC supplies power to the digital communication
circuitry, I2C, of the device. The allowable voltage range is from
1.2V to 5.5V.
GND
Device ground. For single supply systems, the pin connects to
system ground. For dual supply systems, the pin connects to the
negative voltage supply in the system.
VREG_IN
VREG_IN is the voltage regulator input pin. The operable input
voltage range to the regulator is 4.5V to 60V.
VREG_OUT
VREG_OUT is the voltage regulator output pin. The regulated
output voltage of 3.3V is sourced from the VREG_OUT pin.
DAC_OUT
DAC_OUT is the margin DAC output pin. The output of the DAC
voltage ranges from 0V to 2.4V. The voltage DAC is controlled
through internal registers.
ADDRESS PINS (A0, A1, A2)
A0, A1 and A2 are address selectable pins. The address pins are
I2C/SMBus slave address select pins that are multilogic
programmable for a total of 55 different address combinations.
There are four selectable levels for the address pins, I2CVCC,
GND, SCL/SMBCLK, and SDA/SMBDAT. See Table 49 on page 45
for more details in setting the slave address of the device.
SDA/SMBDAT
SDA/SMBDAT is the serial data input/output pin. SDA/SMBDAT
is a bidirectional pin used to transfer data to and from the device.
The pin is an open-drain output and may be wired with other
open-drain/collector outputs. The input buffer is always active
(not gated). The open-drain output requires a pull-up resistor for
proper functionality. The pull-up resistor should be connected to
I2CVCC of the device.
SCL/SMBCLK
SCL/SMBCLK is the serial clock input pin. The SCL/SMBCLK
input is responsible for clocking in all data to and from the
device. The input buffer on the pin is always active (not gated).
The input pin requires a pull-up resistor to I2CVCC of the device.
SMBALERT PINS (SMBALERT1, SMBALERT2)
The SMBALERT pins are output pins. The SMBALERT1 is an
open-drain output and requires a pull-up resistor to a power
supply up to 24V. The SMBALERT2 has a push/pull output stage.
The SMBALERT pins are fault acknowledgment pins. The pin can
be connected to peripheral circuitry to halt operations when a
fault event occurs.
EXT_CLK
EXT_CLK is the external clock pin. EXT_CLK is an input pin. The
pin provides a connection to the system clock. The system clock
is connected to the ADC. The acquisitions rate of the ADC can be
varied through the EXT_CLK pin. The pin functionality is set
through a control register bit.
REGISTER
ADDRESS
(HEX)
REGISTER NAME
IC DEVICE DETAILS
19 CAPABILITY
20 VOUT MODE
99 PMBUS REV
AD IC DEVICE ID
AE IC DEVICE REV
GLOBAL IC CONTROLS
12 RESTORE DEFAULT LL
01 OPERATION
TABLE 2. ISL28023 REGISTER DESCRIPTIONS
FUNCTION
POWER ON RESET NUMBER ACCESS
VALUE (HEX) OF BYTES TYPE PAGE
PMBus Supportability
Describes the ADC Read Back Format
PMBus Revision
Device ID
Device Revision and Silicon Version
B0
1
40
1
22
1
49534C3238303233 8
000002
3
R
31
R
31
R
31
R
31
R
31
Soft Reset
Turns the Device On and Off
N/A
0
W
32
80
1
R/W 32
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FN8389.5
March 18, 2016