SI53106 Datasheet, PDF (26/34 Pages) Silicon Laboratories – SIX-OUTPUT PCIE GEN 3 BUFFER/ZERO DELAY BUFFER

Si53106
6. Pin Descriptions: 40-Pin QFN
100M_133M ¹
HBW_BYPASS_LBW ²
PWRGD / PWRDN ³
VDDR 4
CLK_IN 5
CLK_IN 6
SA_0 7
SDA 8
SCL ⁹
SA_1 10
Si53106
Connect epad
Pin41 to GND
30 VDD_IO
29 OE_3
28 _{DIF_3}
27 DIF_3
26 NC
25 ^VDD
24 DIF_2
23 DIF_2
22 OE_2
21 VDD_IO
26
Rev. 1.2