SI53106 Datasheet, PDF (21/34 Pages) Silicon Laboratories – SIX-OUTPUT PCIE GEN 3 BUFFER/ZERO DELAY BUFFER

Si53106
Table 18. Byte 1: Output Enable Control Register
Bit
Description
If Bit = 0 If Bit = 1
Type
Default Output(s)
Affected
0
Reserved
0
1
Output Enable DIF0
Low/Low
Enabled
RW
1
DIF0
2
Output Enable DIF1
Low/Low
Enabled
RW
1
DIF1
3
Reserved
0
4
Reserved
0
5
Output Enable DIF2
Low/Low
Enabled
RW
1
DIF2
6
Output Enable DIF3
Low/Low
Enabled
RW
1
DIF3
7
Reserved
0
Rev. 1.2
21