SI5023 Datasheet, PDF (23/28 Pages) Silicon Laboratories – MULTI-RATE SONET/SDH CDR IC WITH LIMITING AMPLIFIER

Si5023
Pin #
5
6
7
8
9
10
11,14,18,21,
25
12
13
15
16
17
Table 9. Si5023 Pin Descriptions (Continued)
Pin Name
REFCLK+
REFCLK–
LOL
LTR
LOS
DSQLCH
VDD
DIN+
DIN–
GND
DOUT–
DOUT+
I/O Signal Level
Description
I
See Table 2 Differential Reference Clock (Optional).
When present, the reference clock sets the center
operating frequency of the DSPLL for clock and
data recovery. Tie REFCLK+ to VDD and REFCLK–
to GND to operate without an external reference
clock.
See Table 8 for typical reference clock frequencies.
O
LVTTL Loss-of-Lock.
This output is driven low when the recovered clock
frequency deviates from the reference clock by the
amount specified in Table 4 on page 9. If no exter-
nal reference is supplied, this signal will be active
when the internal PLL is no longer locked to the
incoming data.
I
LVTTL Lock-to-Reference.
When this pin is low, the DSPLL disregards the data
inputs. If an external reference is supplied, the out-
put clock is locked to the supplied reference. If no
external reference is used, the DSPLL locks the
control loop until LTR is released.
Note: This input has a weak internal pullup.
O
LVTTL Loss-of-Signal.
This output pin is driven low when the input signal is
below the threshold set via LOS_LVL. (LOS opera-
tion is guaranteed only when ac coupling is used on
the DIN inputs.)
LVTTL Data Squelch.
When driven high, this pin forces the data present
on DOUT+ = 0 and DOUT– = 1. For normal opera-
tion, this pin should be low. DSQLCH may be used
during LOS/LOL conditions to prevent random data
from being presented to the system.
Note: This input has a weak internal pulldown.
3.3 V
Supply Voltage.
Nominally 3.3 V.
I
See Table 2 Differential Data Input.
Clock and data are recovered from the differential
signal present on these pins. AC coupling is recom-
mended.
GND
Production Test Input.
This pin is used during production testing and must
be tied to GND for normal operation.
O
CML
Differential Data Output.
The data output signal is a retimed version of the
data recovered from the signal present on DIN.
Rev. 1.25
23