SI5023 Datasheet, PDF (21/28 Pages) Silicon Laboratories – MULTI-RATE SONET/SDH CDR IC WITH LIMITING AMPLIFIER

Si5023
4.19. Differential Output Circuitry
The Si5023 utilizes a CML architecture to output both the recovered clock (CLKOUT) and data (DOUT). An
example of output termination with ac coupling is shown in Figure 20. In applications in which direct dc coupling is
possible, the 0.1 µF capacitors may be omitted. The differential peak-to-peak voltage swing of the CML
architecture is specified in Table 2.
2.5 V (±5%)
100 Ω
DOUT+,
CLKOUT+
0.1 µF
VDD
50 Ω
Zo = 50 Ω
DOUT–,
CLKOUT– ^{0.1 µF}
Zo = 50 Ω
100 Ω
2.5 V (±5%)
50 Ω
VDD
Figure 20. Output Termination for DOUT and CLKOUT (ac coupled)
Rev. 1.25
21