SI5023 Datasheet, PDF (1/28 Pages) Silicon Laboratories – MULTI-RATE SONET/SDH CDR IC WITH LIMITING AMPLIFIER

Si5023
MULTI-RATE SONET/SDH CDR IC WITH LIMITING AMPLIFIER
Features
High-speed clock and data recovery device with integrated limiting amp:
Supports OC-48/12/3, STM-16/4/ Bit error rate alarm
1, Gigabit Ethernet, and 2.7 Gbps _{Reference and referenceless}
FEC
operation supported
DSPLL^® technology
Loss-of-signal level alarm
Jitter generation 3.0 mUI_rms
(TYP)
Small footprint: 5 x 5 mm
Data slicing level control
10 mV_PP differential sensitivity
3.3 V supply
Applications
SONET/SDH/ATM routers
Add/drop multiplexers
Digital cross connects
Gigabit Ethernet interfaces
SONET/SDH test equipment
Optical transceiver modules
SONET/SDH regenerators
Board level serial links
Ordering Information:
See page 25.
Pin Assignments
Si5023
Description
The Si5023 is a fully-integrated, high-performance limiting amp and clock
and data recovery (CDR) IC for high-speed serial communication systems.
It derives timing information and data from a serial input at OC-48/12/3,
STM-16/4/1, or Gigabit Ethernet (GbE) rates. Support for 2.7 Gbps data
streams is also provided for OC-48/STM-16 applications that employ
forward error correction (FEC). Use of an external reference clock is
optional. Silicon Laboratories DSPLL^® technology eliminates sensitive
noise entry points, thus making the PLL less susceptible to board-level
interaction and helping to ensure optimal jitter performance.
The Si5023 represents a new standard in low jitter, low power, small size,
and integration for high-speed LA/CDRs. It operates from a 3.3 V supply
over the industrial temperature range (–40 to 85 °C).
RATESEL0
RATESEL1
LOS_LVL
SLICE_LVL
REFCLK+
REFCLK–
LOL
28 27 26 25 24 23 22
1
21 VDD
2
20 REXT
3
19 RESET/CAL
4
GND
Pad
18 VDD
5
17 DOUT+
6
16 DOUT–
7
15 GND
8 9 10 11 12 13 14
Top View
Functional Block Diagram
LOS_LVL
LOS
DIN+
DIN–
REFCLK+
REFCLK–
(Optional)
Signal
Detect
Retimer
BUF
2
2
Limiting
Amp
DSPLL
BER
Monitor
2
BUF
2
Lock
Detection
2
Bias Gen.
Reset/
Calibration
SLICE_LVL
BER_ALM
BERMON
LTR ^BER_LVL
LOL
REXT
RATESEL
RESET/CAL
DSQLCH
DOUT+
DOUT–
CLKOUT+
CLKOUT–
CLK_DSBL
Rev. 1.25 10/05
Copyright © 2005 by Silicon Laboratories
Si5023