AN921 Datasheet, PDF (2/24 Pages) Silicon Laboratories – Configurable Logic Unit

AN921: Configurable Logic Unit
Configurable Logic Overview
1. Configurable Logic Overview
The configurable logic module provides multiple blocks of user-programmed digital logic that operate without CPU intervention. In the
EFM8LB1 and EFM8BB3 families, the configurable logic (CL) module contains of four independent configurable logic units (CLUs) that
support user-programmable asynchronous and synchronous Boolean logic operations. A number of internal and external signals may
be used as inputs to each CLU, and the outputs may be routed out to port I/O pins or directly to select peripheral inputs.
Each CLU has a look up table (LUT) logic function that can be used to provide up to 256 different functions for 3 inputs – A and B inputs
from 16-input multiplexers and a carry input from the LUT output of the previous CLU. The A and B input multiplexers can select port
pins or the output of any CLU. Since there are many possible functions with 3 inputs, it can be quite challenging to determine the appro-
priate value to write to the LUT register (CLUnFN).
The LUT implements combinatorial Boolean logic, and there is a way to programmatically determine the value to write to CLUnFN using
combination Boolean functions. The examples discussed in this document use a header file SI_LUT.h that contains macros and defini-
tions to simplify the LUT initialization. For example, if we wish to implement LUT logic such as:
(A AND B) OR C
The C code would be:
CLU0FN = LUT_OR( LUT_AND(SI_LUT_A, SI_LUT_B), SI_LUT_C )
Alternatively, the look up table can be initialized using the Simplicity Studio Configurator.
Each CLU contains a D flip-flop, whose input is the LUT output. The D flip-flop clock is selected using the CLKSEL bitfield in the
CLUnCF register. The D flip-flop can be bypassed by using setting the OUTSEL bit high in the CLUnCN register.
silabs.com | Smart. Connected. Energy-friendly.
Rev. 0.1 | 1