SI5351-B Datasheet, PDF (16/41 Pages) Silicon Laboratories – Supports static phase offset

Si5351A/B/C-B
4. I²C Interface
Many of the functions and features of the Si5351 are controlled by reading and writing to the RAM space using the
I²C interface. The following is a list of the common features that are controllable through the I²C interface. For a
complete listing of available I²C registers and programming steps, please see “AN619: Manually Generating an
Si5351 Register Map.”
Read Status Indicators
Crystal Reference Loss of signal, LOS_XTAL, reg0[3]
CLKIN Loss of signal, LOS_CLKIN, reg0[4]
PLLA and/or PLLB Loss of lock, LOL_A or LOL_B, reg0[6:5]
Configuration of multiplication and divider values for the PLLs, MultiSynth dividers
Configuration of the Spread Spectrum profile (down or center spread, modulation percentage)
Control of the cross point switch selection for each of the PLLs and MultiSynth dividers
Set output clock options
Enable/disable for each clock output
Invert/non-invert for each clock output
Output divider values (2ⁿ, n=1.. 7)
Output state when disabled (stop hi, stop low, Hi-Z)
Output phase offset
The I²C interface operates in slave mode with 7-bit addressing and can operate in Standard-Mode (100 kbps) or
Fast-Mode (400 kbps) and supports burst data transfer with auto address increments.
The I²C bus consists of a bidirectional serial data line (SDA) and a serial clock input (SCL) as shown in Figure 7.
Both the SDA and SCL pins must be connected to the VDD supply via an external pull-up as recommended by the
I²C specification.
VDD
I²C Bus
>1k
4.7 k
>1k
SCL
SDA
INTR
Si5351
I²C Address Select:
A0
Pull-up to VDD (A0 = 1)
Pull-down to GND (A0 = 0)
Figure 7. I²C and Control Signals
The 7-bit device (slave) address of the Si5351 consist of a 6-bit fixed address plus a user selectable LSB bit as
shown in Figure 8. The LSB bit is selectable as 0 or 1 using the optional A0 pin which is useful for applications that
require more than one Si5351 on a single I²C bus.
Slave Address
6 54 32 1 0
1 1 0 0 0 0 0/1
A0
Figure 8. Si5351 I²C Slave Address
16
Rev. 1.0