SDA9257 Datasheet, PDF (9/36 Pages) Siemens Semiconductor Group – Clock Sync Generator

SDA 9257
Vertical Processor and VCO Control (subaddress 02)
Generation of V Pulse
V derived from CVBS
Free-running generation; vertical frequency is determined by VF
bit, VOFF bit is enabled, SCHW bit should be set to 1
Control Bit FREE
0
1
Vertical Noise Suppression
Noise suppression enabled
No noise suppression
Control Bit VOFF
0
1
Number of Lines per Field
Control Bit VF
312.5 or 312
0
262.5 or 262
1
Note: VF must be set to the number of lines present in CVBS for flywheel and noise suppression
modes.
VF is determined by the number of lines per field for the free-running or terminal mode.
Width of Window in Vertical Processing
Wide window in vertical noise suppression mode and for
detection of status bits FF and FFGF
Narrow window (refer also to timing diagrams 8 and 9)
Control Bit VWW
0
1
Number of Lines per Field
Generated in Free-Running Mode
312
262
312.5
262.5
344
288
x: don’t care
FREE
×
×
1
1
1
1
Control Bits
TERM SCHW
VF
1
×
0
1
×
1
0
1
0
0
1
1
0
0
0
0
0
1
VOFF
×
×
×
×
×
×
Semiconductor Group
190