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SDA9257 Datasheet, PDF (14/36 Pages) Siemens Semiconductor Group – Clock Sync Generator | |||
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SDA 9257
SC Start Time (subaddress 12)
Start Time of H Insertion in the
SC or SSC Pulse
Time
Number in 13.5-MHz
Clock Periods
+ 9.55 µs + 129
(+ 128) + 1*
...
Control Bits
(+) (Twoâs Complement) (LSB)
SC0N8 SC0N7 SC0N6 ⦠SC0N2 SC0N1
1
0
0
â¦
0
0
...
74 ns
+1
...
â (0) + 1*
0
0
0
â¦
0
0
...
â 9.33 µs â 126
â (+ 127) + 1*
0
1
1
â¦
1
1
Freezing of Actual Clock Frequency in Number of Lines Near the Vertical Pulse (subaddress 13)
Start of Clock Frequency
in Number of Lines
before the Vertical Pulse
0 (no freezing)
1
.
.
.
15
FION4
0
0
1
Control Bits
FION3
0
0
...
1
FION2
0
0
1
FION1
0
1
1
Duration of Clock Frequency
Freezing in Number of Lines
0 (no freezing)
.
.
.
15
* Due to the internal delays
FILE4
0
1
Control Bits
FILE3
FILE2
0
0
...
1
1
FILE1
0
1
Semiconductor Group
195
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