SDA9257 Datasheet, PDF (18/36 Pages) Siemens Semiconductor Group – Clock Sync Generator

SDA 9257
Pin Definitions and Functions
Pin No. Symbol
1
I1
2
T1
3
T2
4
RES
5
VS
6
V_BB
7
V_DDA
8
V_SSA
9
HREF
10
CVBS
11
ADR0
12
ADR1
13
SINC
14
SC
15
CLK1
16
CLK2
17
CLKE
18
H2
19
X2
20
X1
21
V_DD
22
V_SS
23
HI
24
XQL
25
SCL
26
SDA
27
BLN
28
HS
Function
Description
I²C Bus bit I1
Pin (e. g. for source selection) set by I²C Bus
Test pin
Test pin, connect to V_SS
Smoothing and test pin Internal smoothing, test pin
Reset
Reset output, active low
Vertical sync pulse
Tristate vertical pulse output
V_BB
+5V
Substrate bias
Analog supply
Ground
Analog ground
+3V
High reference voltage
CVBS
Address 0
Address 1
CVBS input, 2 V_SS nom.
I²C-chip select
Serial increment
Output for serial increment or
inverse burst-key output
Sandcastle
SC, SSC or CS output
Clock 1
Tristate clock output, 24-32 MHz
Clock 2
Tristate clock output, 12-16 MHz or 24-32 MHz
External clock
External clock input, 24-32 MHz
Clamping pulse
Clamping pulse input
Xtal 2
Crystal connection
Xtal 1
Crystal connection (clock input)
+5V
Digital supply
Ground
Digital ground
Clamping pulse
Clamping pulse output
Xtal clock
Crystal clock output
Clock I²C Bus
Clock input, I²C Bus
Serial data I²C Bus
Bi-directional data, I²C Bus
Blanking out
Tristate output for Featurebox
Horizontal sync pulse Tristate H-pulse output
Semiconductor Group
199