HYB514265BJ-400 Datasheet, PDF (7/28 Pages) Siemens Semiconductor Group – 256K x 16-Bit EDO-Dynamic RAM

HYB 5(3)14265BJ(L)-400/-40/-45/-50
256K x 16 EDO-DRAM
Parameter
Symbol Limit Values
min.
max.
Average V_CC supply current during
RAS-only refresh cycles:
I_CC3
–
-45 version
105
-50 version
95
Unit Test
Condition
mA ^{2, 4}
Average V_CC supply current during hyper page I_CC4
–
mode (EDO) operation:
-45 version
-50 version
Standby V_CC supply current
(RAS = LCAS = UCAS = WE = V_CC – 0.2 V)
I_CC5
–
Standby V_CC supply current (L-version only) I_CC5
–
(RAS = LCAS = UCAS = WE = V_CC – 0.2 V)
Average V_CC supply current during CAS-
–
before-RAS refresh mode:
I_CC6
-45 version
-50 version
Self Refresh Current (L-version only)
I_CC7
–
CBR cycle with RAS >trasss(min), CAS held low;
WE = V_CC – 0.2 V,
Addresses and Din = V_CC – 0.2 V or 0.2 V
mA ^{2, 3, 4}
75
65
1
mA 1
200
µA 1
mA ^{2, 4}
105
95
250
µA
Capacitance
T_A = 0 to 70 °C; f = 1 MHz
Parameter
Symbol
Limit Values
Unit
min.
max.
Input capacitance (A0 to A8)
C_I1
–
5
pF
Input capacitance (RAS, UCAS, LCAS, WE, OE) C_I2
–
7
pF
Output capacitance (l/O1 to l/O16)
C_IO
–
7
pF
Semiconductor Group
7