HYB514265BJ-400 Datasheet, PDF (11/28 Pages) Siemens Semiconductor Group – 256K x 16-Bit EDO-Dynamic RAM

HYB 5(3)14265BJ(L)-400/-40/-45/-50
256K x 16 EDO-DRAM
AC Characteristics ⁵⁾⁶⁾
T_A = 0 to 70 ˚C, t_T = 2 ns
Parameter
16E
Symbol
Limit Values
Unit Note
-45
-50
min. max. min. max.
Common Parameters
Random read or write cycle time
RAS precharge time
RAS pulse width
CAS pulse width
CAS precharge time
Row address setup time
Row address hold time
Column address setup time
Column address hold time
RAS to CAS delay time
RAS to column address delay
RAS hold time
CAS hold time
CAS to RAS precharge time
Transition time (rise and fall)
Refresh period
Refresh period (L-version only)
t_RC
79 –
89 –
ns
t_RP
30 –
35 –
ns
t_RAS
45 10k 50 10k ns
t_CAS
7
10k 8
10k ns
t_CP
7
–
8
–
ns
t_ASR
0
–
0
–
ns
t_RAH
7
–
8
–
ns
t_ASC
0
–
0
–
ns
t_CAH
7
–
8
–
ns
t_RCD
11
33
12
37
ns
t_RAD
9
23 10 25 ns
t_RSH
12
13 –
ns
t_CSH
36
40 –
ns
t_CRP
5
–
5
–
ns
t_T
1
50 1
50 ns 7
t_REF
–
16 –
16 ms
t_REF
–
128 –
128 ms
Read Cycle
Access time from RAS
t_RAC
–
45 –
50 ns 8, 9
Access time from CAS
t_CAC
–
12 –
13 ns 8, 9
Access time from column address
t_AA
–
22 –
25 ns 8,10
OE access time
t_OEA
–
12 –
13 ns
Column address to RAS lead time
t_RAL
23 –
25 –
ns
Read command setup time
t_RCS
0
–
0
–
ns
Read command hold time
t_RCH
0
–
0
–
ns 11
Read command hold time referenced to RAS t_RRH 0
–
0
–
ns 11
CAS to output in low-Z
t_CLZ
0
–
0
–
ns 8
Semiconductor Group
11