C161V_96 Datasheet, PDF (59/260 Pages) Siemens Semiconductor Group – 16-Bit CMOS Single-Chip Microcontrollers

10Jul97@15:19h ^{The Central Processing Unit (CPU) / C161}
The Context Pointer CP
This non-bit addressable register is used to select the current register context. This means that the
CP register value determines the address of the first General Purpose Register (GPR) within the
current register bank of up to 16 wordwide and/or bytewide GPRs.
CP (FE10_H / 08_H)
SFR
Reset Value: FC00_H
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
1111
cp
0
r
r
r
r
rw
r
Bit
Function
cp
Modifiable portion of register CP
Specifies the (word) base address of the current register bank.
When writing a value to register CP with bits CP.11...CP.9 = ‘000’, bits
CP.11...CP.10 are set to ‘11’ by hardware, in all other cases all bits of bit field
“cp” receive the written value.
Note: It is the user’s responsibility that the physical GPR address specified via CP register plus
short GPR address must always be an internal RAM location. If this condition is not met,
unexpected results may occur.
• Do not set CP below 00’F600_H (C161O) or below 00’FA00_H (C161V, C161K)
• Do not set CP above 00’FDFE_H
• Be careful using the upper GPRs with CP above 00’FDE0_H
The CP register can be updated via any instruction which is capable of modifying an SFR.
Note: Due to the internal instruction pipeline, a new CP value is not yet usable for GPR address
calculations of the instruction immediately following the instruction updating the CP register.
The Switch Context instruction (SCXT) allows to save the content of register CP on the stack and
updating it with a new value in just one machine cycle.
Semiconductor Group
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