C161V_96 Datasheet, PDF (146/260 Pages) Siemens Semiconductor Group – 16-Bit CMOS Single-Chip Microcontrollers

10Jul97@15:19h
The General Purpose Timer Units / C161
All three timers of block GPT1 (T2, T3, T4) can run in 3 basic modes, which are timer, gated timer,
and counter mode, and all timers can either count up or down. Each timer has an alternate input
function pin on Port 3 associated with it which serves as the gate control in gated timer mode, or as
the count input in counter mode. The count direction (Up / Down) may be programmed via software
or may be dynamically altered by a signal at an external control input pin. Each overflow/underflow
of core timer T3 may be indicated on an alternate output function pin. The auxiliary timers T2 and
T4 may additionally be concatenated with the core timer, or used as capture or reload registers for
the core timer.
Note: External GPT1 control is provided on the C161K and the C161O, not on the C161V.
The current contents of each timer can be read or modified by the CPU by accessing the
corresponding timer registers T2, T3, or T4, which are located in the non-bitaddressable SFR
space. When any of the timer registers is written to by the CPU in the state immediately before a
timer increment, decrement, reload, or capture is to be performed, the CPU write operation has
priority in order to guarantee correct results.
Figure 9-2
GPT1 Block Diagram
Semiconductor Group
9-2