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SAB88C166 Datasheet, PDF (45/58 Pages) Siemens Semiconductor Group – 16-Bit CMOS Single-Chip Microcontrollers with/without oscillator prescaler with 32 KByte Flash EPROM
SAB 88C166(W)
AC Characteristics (cont’d)
Demultiplexed Bus for the SAB 88C166
VCC = 5 V ± 10 %; VSS = 0 V
TA = 0 to + 70 ˚C for SAB 88C166-5M
CL (for Port 0, Port 1, Port 4, ALE, RD, WR, BHE, CLKOUT) = 100 pF
ALE cycle time = 4 TCL + 2tA + tC + tF (100 ns at 20-MHz CPU clock without waitstates)
Parameter
ALE high time
Address setup to ALE
ALE falling edge to RD,
WR (with RW-delay)
ALE falling edge to RD,
WR (no RW-delay)
RD, WR low time
(with RW-delay)
RD, WR low time
(no RW-delay)
RD to valid data in
(with RW-delay)
RD to valid data in
(no RW-delay)
ALE low to valid data in
Address to valid data in
Data hold after RD
rising edge
Data float after RD rising
edge (with RW-delay)
Data float after RD rising
edge (no RW-delay)
Data valid to WR
Data hold after WR
ALE rising edge after RD,
WR
Address hold after RD,
WR
Symbol Max. CPU Clock
= 20 MHz
min.
max.
t5CC
15 + tA
–
t6CC
10 + tA
–
t8CC
15 + tA
–
t9CC
– 10 + tA –
t12CC 40 + tC
–
t13CC 65 + tC
–
t14SR –
30 + tC
t15SR –
55 + tC
t16SR –
t17SR –
t18SR 0
55
+ tA + tC
75
+ 2tA + tC
–
t20SR –
35 + tF
t21SR –
15 + tF
t22CC 35 + tC
–
t24CC
t26CC
15 + tF
–
– 10 + tF –
t28CC 0 + tF
–
Variable CPU Clock
1/2TCL = 1 to 20 MHz
min.
max.
TCL – 10 + tA –
TCL – 15 + tA –
TCL – 10 –
+ tA
– 10
–
+ tA
2TCL – 10 –
+ tC
3TCL – 10 –
+ tC
–
2TCL – 20
+ tC
–
3TCL – 20
+ tC
–
3TCL – 20
+ tA + tC
–
4TCL – 25
+ 2tA + tC
0
–
–
–
2TCL – 15
+ tC
TCL - 10 + tF
– 10
+ tF
0
+ tF
2TCL – 15
+ tF
TCL – 10
+ tF
–
–
–
–
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Semiconductor Group
44