SAB88C166 Datasheet, PDF (27/58 Pages) Siemens Semiconductor Group – 16-Bit CMOS Single-Chip Microcontrollers with/without oscillator prescaler with 32 KByte Flash EPROM

SAB 88C166(W)
Fundamentals of Flash Technology
The Flash memory included in the SAB 88C166(W) combines the EPROM programming
mechanism with electrical erasability (like an EEPROM) to create a highly reliable and cost effective
memory. A Flash memory cell consists of a single transistor with a floating gate for charge storage
like an EPROM, uses a thinner gate oxide, however.
The programming mechanism of a Flash cell is based on ‘hot’ electron injection which works as
follows: The high voltage between drain and source forces ‘hot’ electrons supplied from the source
to enter the channel. Attracted by the high voltage on the cell’s control gate there, free electrons are
trapped into the floating gate. The amount of negative charge on the floating gate is basically
determined by the length and the number of programming pulses applied to the cell. A special read
operation, Program-Verify, is provided for verifying that the charge put onto the floating gate
represents a proper ‘0’.
Figure 9
Flash Memory Cell Programming Mechanism
The cell erase mechanism is based on ‘Fowler-Nordheim’ tunnelling which works as follows:
A high voltage is applied to the cell’s source whilst the control gate grounded. The cell’s drain is
disconnected in this case. Attracted by the high voltage on the cell’s source, electrons migrate from
the floating gate to the source. The amount of negative charge removed from the floating gate is
basically determined by the length and the number of erasing pulse applied to the cell. A special
read operation, Erase-Verify, is provided for verifying that the charge remaining on the floating gate
represents a proper ‘1’.
Unlike a standard EEPROM, where individual bytes can be erased, the Flash memory of the SAB
88C166(W) is erased block-wise which means that the high voltage is applied to all cells belonging
to one block simultaneously.
One requirement for performing proper Flash programming and erase operations is to have all cells
of a block set to a minimum threshold level before the operation is started. A cell erasing faster than
others could have a threshold voltage too low or negative. In this case the corresponding transistor
could become conductive and affect other cells placed in the same column of the transistor array.
Thus, all cells of that column could erroneously be read as ‘1’ instead of ‘0’.
Semiconductor Group
26