HYB514100BJ-50- Datasheet, PDF (17/21 Pages) Siemens Semiconductor Group – 4M x 1-Bit Dynamic RAM

HYB 514100BJ-50/-60
4M × 1 DRAM
V_IH
RAS
V_IL
V_IH
CAS
V_IL
V_IH
A0 - A10
V_IL
t _RC
t _RAS
t _RCD
t _RSH
t _ASR
t _RAD
t _ASC
t _RAH
Row
Addr.
t _RCS
t _CAH
Column
Address
V_IH
WE
V_IL
t _AA
t _CAC
t _CLZ
t _RAC
DO
V_OH
(Output) _VOL
t _RC
t _RP
t _RAS
t _RP
t _CHR
t _CRP
t _WRP
t _WRH
t _RRH
t _ASR
Row
Address
Valid Data OUT
t _OFF
Hi Z
"H" or "L"
SPT03021
Hidden Refresh Cycle (Read)
Semiconductor Group
17
1998-10-01