HYB514100BJ-50- Datasheet, PDF (12/21 Pages) Siemens Semiconductor Group – 4M x 1-Bit Dynamic RAM

HYB 514100BJ-50/-60
4M × 1 DRAM
V_IH
RAS
V_IL
t _CSH
CAS
V_IH
V_IL
t _ASR
t _RCD
t _RAD
t _RAH
t _ASC
t _CAS
t _CAH
V_IH
A0 - A10
V_IL
V_IH
WE
V_IL
Row
Address
Column
Address
t _RWD
t _RCS
t _CWD
t _CWL
t _AWD
t _AA
t _DS
t _RASP
t _CP
t _PRWC
t _CAS
t _ASC
t _CAH
Column
Address
t _CPWD
t _CWD
t _CWL
t _AWD
t _WP
t_AA
t _DS
t _DH
t _RSH
t _CAS
t _RAL
t _CAH
t _ASC
Column
Address
t _CPWD
t _CWD
t _CWL
t _RWL
t _AWD
t _WP
t _WP
t _DH
t_AA
t _DS
t _DH
t _RP
t _CRP
t _ASR
Row
Address
DI
V_IH
(Input) _VIL
DO
V_OH
(Output) _VOL
t _RAC
t _CLZ
t _CAC
Data IN
t _CPA
t _CLZ
t _CAC
t _OFF
Data OUT
Data IN
t _CPA
t _CLZ
t _OFF
Data OUT
Data IN
t _OFF
Data OUT
"H" or "L"
SPT03016
Fast Page Mode Read-Modify-Write Cycle
Semiconductor Group
12
1998-10-01