HYB514100BJ-50- Datasheet, PDF (14/21 Pages) Siemens Semiconductor Group – 4M x 1-Bit Dynamic RAM

HYB 514100BJ-50/-60
4M × 1 DRAM
V_IH
RAS
V_IL
V_IH
CAS
V_IL
t _ASR
t _RCD
t _PC
t _CAS
t _RAH
t _ASC
t _CAH
t _RASP
t _CAS
t _CP
t _ASC ^{t CAH}
V_IH
A0 - A10
V_IL
Row
Column
Addr
Address
t _RAD
t _WCS
t _CWL
Column
Address
t _WCS
t _CWL
V_IH
WE
V_IL
t _WCH
t _WP
t _WCH
t _WP
t _DS
t _DH
t _DS
t _DH
DI
V_IH
(Input) _VIL
Valid
Data IN
Valid
Data IN
DO
V_OH
Hi Z
(Output) _VOL
t _RSH
t _CAS
t _RAL
t _CAH
t _ASC
Column
Address
t _WCS
t _RWL
t _CWL
t _WCH
t _WP
t _DS
t _DH
Valid
Data IN
t _RP
t _CRP
t _ASR
Row
Address
"H" or "L"
SPT03018
Fast Page Mode Early Write Cycle
Semiconductor Group
14
1998-10-01