K4E660812E Datasheet, PDF (5/21 Pages) Samsung semiconductor – 8M x 8bit CMOS Dynamic RAM with Extended Data Out

K4E660812E,K4E640812E
CAPACITANCE (TA=25°C, VCC=3.3V, f=1MHz)
Parameter
Symbol
Min
Input capacitance [A0 ~ A12]
CI N 1
-
Input capacitance [RAS, CAS , W, OE]
CI N 2
-
Output capacitance [DQ0 - DQ7]
C DQ
-
CMOS DRAM
Max
5
7
7
Units
pF
pF
pF
AC CHARACTERISTICS (0°C≤TA≤70°C, See note 2)
Test condition : VCC =3.3V±0.3V, Vih/Vil=2.2/0.7V, Voh/Vol=2.0/0.8V
Parameter
Symbol
-45
Min Max
Random read or write cycle time
tR C
74
Read-modify-write cycle time
tR W C
101
Access time from RAS
Access time from CAS
tR A C
45
tC A C
12
Access time from column address
tA A
23
CAS to output in Low-Z
tCLZ
3
Output buffer turn-off delay from CAS
tC E Z
3
13
OE to output in Low-Z
tOLZ
3
Transition time (rise and fall)
RAS precharge time
tT
1
50
tR P
25
RAS pulse width
tR A S
45 10K
RAS hold time
tR S H
8
CAS hold time
tC S H
35
CAS pulse width
tC A S
7
5K
RAS to CAS delay time
RAS to column address delay time
tRCD
tR A D
11
33
9
22
CAS to RAS precharge time
tC R P
5
Row address set-up time
tASR
0
Row address hold time
tR A H
7
Column address set-up time
Column address hold time
tASC
0
tC A H
7
Column address to RAS lead time
tR A L
23
Read command set-up time
tR C S
0
Read command hold time referenced to CAS tRCH
0
Read command hold time referenced to RAS tRRH
0
Write command hold time
Write command pulse width
tW C H
7
tW P
6
Write command to RAS lead time
tR W L
8
Write command to CAS lead time
tC W L
7
Data set-up time
tD S
0
-50
Min Max
84
113
50
13
25
3
3
13
3
1
50
30
50 10K
8
38
8
10K
11
37
9
25
5
0
7
0
7
25
0
0
0
7
7
8
7
0
-60
Min Max
104
138
60
15
30
3
3
13
3
1
50
40
60 10K
10
40
10 10K
14
45
12
30
5
0
10
0
10
30
0
0
0
10
10
10
10
0
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Note
3,4,10
3,4,5
3,10
3
6,13
3
2
14
4
10
8
8
9