DS_K7R323682M Datasheet, PDF (17/19 Pages) Samsung semiconductor – 1Mx36 & 2Mx18 & 4Mx9 QDRTM II b2 SRAM

K7R323682M
K7R321882M
K7R320982M
1Mx36 & 2Mx18 & 4Mx9 QDR^TM II b2 SRAM
SCAN REGISTER DEFINITION
Part
1Mx36
2Mx18
4Mx9
Instruction Register
3 bits
3 bits
3 bits
Bypass Register
1 bit
1 bit
1 bit
ID Register
32 bits
32 bits
32 bits
Boundary Scan
109 bits
109 bits
109 bits
ID REGISTER DEFINITION
Part
Revision Number
Part Configuration
Samsung JEDEC Code
Start Bit(0)
(31:29)
(28:12)
(11: 1)
1Mx36
000
00def0wx0t0q0b0s0
00001001110
1
2Mx18
000
00def0wx0t0q0b0s0
00001001110
1
4Mx9
000
00def0wx0t0q0b0s0
00001001110
1
Note : Part Configuration
/def=010 for 36Mb, /wx=11 for x36, 10 for x18, 00 for x9.
/t=1 for DLL Ver., 0 for non-DLL Ver. /q=1 for QDR, 0 for DDR /b=1 for 4Bit Burst, 0 for 2Bit Burst /s=1 for Separate I/O, 0 for Common I/O
BOUNDARY SCAN EXIT ORDER
ORDER
PIN ID
1
6R
2
6P
3
6N
4
7P
5
7N
6
7R
7
8R
8
8P
9
9R
10
11P
11
10P
12
10N
13
9P
14
10M
15
11N
16
9M
17
9N
18
11L
19
11M
20
9L
21
10L
22
11K
23
10K
24
9J
25
9K
26
10J
27
11J
28
11H
29
10G
30
9G
31
11F
32
11G
33
9F
34
10F
35
11E
36
10E
Note : 1. NC pins are read as "X" ( i.e. don′t care.)
ORDER
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
PIN ID
10D
9E
10C
11D
9C
9D
11B
11C
9B
10B
11A
10A
9A
8B
7C
6C
8A
7A
7B
6B
6A
5B
5A
4A
5C
4B
3A
2A
1A
2B
3B
1C
1B
3D
3C
1D
ORDER
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
PIN ID
2C
3E
2D
2E
1E
2F
3F
1G
1F
3G
2G
1H
1J
2J
3K
3J
2K
1K
2L
3L
1M
1L
3N
3M
1N
2M
3P
2N
2P
1P
3R
4R
4P
5P
5N
5R
Internal
- 17 -
Dec. 2003
Rev 2.0