DS_K7R323682M Datasheet, PDF (13/19 Pages) Samsung semiconductor – 1Mx36 & 2Mx18 & 4Mx9 QDRTM II b2 SRAM

K7R323682M
K7R321882M
K7R320982M
1Mx36 & 2Mx18 & 4Mx9 QDR^TM II b2 SRAM
PIN CAPACITANCE
PRMETER
Address Control Input Capacitance
Input and Output Capacitance
Clock Capacitance
SYMBOL
C IN
C OUT
CCLK
Note: 1. Parameters are tested with RQ=250 Ω and V DDQ=1.5V.
2. Periodically sampled and not 100% tested.
TESTCONDITION
VIN=0V
VOUT = 0 V
-
Typ
Max
Unit
NOTES
4
5
pF
6
7
pF
5
6
pF
THERMAL RESISTANCE
PRMETER
SYMBOL
Typ
Unit
NOTES
Junction to Ambient
Junction to Case
Junction to Pins
θ JA
20.8
°C/W
θJC
2.3
°C/W
θ JB
4.3
°C/W
Note: Junction temperature is a function of on-chip power dissipation, package thermal impedance, mounting site temperature and mounting site
thermal impedance. TJ=TA + PD x θJA
APPLICATION INRORMATION
SRAM#1
ZQ ^R=250Ω
CQ
SRAM#4
R=250Ω
ZZQQ
CQ
CQ
CQ
Vt
D
Q
R
SA _{R W BW0 BW1 C C K K}
D
Q
SA _{RW BW0 BW1 C C K K}
Data In
Data Out
Address
R
W
BW
MEMORY
CONTROLLER
Return CLK
Source CLK
Return CLK
Source CLK
Vt
Vt
R=50Ω Vt=VREF
Vt
Vt
R
SRAM1 Input CQ
SRAM1 Input CQ
SRAM4 Input CQ
SRAM4 Input CQ
- 13 -
Dec. 2003
Rev 2.0