S5L986F01 Datasheet, PDF (10/35 Pages) Samsung semiconductor – DIGITAL SIGNAL PROCESSOR FOR CDP

S5L9286F01
DIGITAL SIGNAL PROCESSOR FOR CDP
FUNCTION DESCRIPTION
Micom Interface
The data inputted from Micom is inputted to MDAT and transfered by MCK, and the inputted signal is loaded to
control register by means of MLT. The timing chart is as follows.
MDAT
MCK
MLT
Register
(9X ~ FX)
D0
D1
D2
D3
D4
D5
D6
D7 <MSB>
Valid
MDAT
MCK
MLT
Register
(88XX, 8DXX)
D0
D1
D2
D3
D4
∬
D11
D12
D13
D14
D15 <MSB>
∬
Valid
Control
Regster
CNTL-Z
CNTL-S
CNTL-L
CNTL-U
CNTL-W
CNTL-C
CNTL-D
Figure 1. MICOM data input timing chart
Table 1. Control register & data
Comment
Data Control
Frame Sync Protection
Attenuation Control
Tracking Counter
Lower 4 Bits
Tracking Counter
Upper 4 Bits
CLV Control
CLV-Mode
Double-speed
Address
D7~D4
9X
AX
BX
CX
DX
EX
FX
D3
ZCMT
FSEM
TRC3
TRC7
-
CM3
0
Data
D2
D1
-
NCLV
FSEL WSEL
TRC2 TRC1
TRC6 TRC5
WB
CM2
0
WP
CM1
DS1
D0
CRCQ
ATTM
/ISTAT
Pin
S0S1
LKFS
TRC0 /COMPLETE
TRC4
/COUNT
GAIN
CM0
DS2
FOK
/(Pw > 64)
TRCNT
Control
Regster
Comment
CNTL-F
CNTL-H
Function
Control
ESP,monitor
Pin Control
NOTE: –;Reserved
Address
D15-D8 _{D7 D6 D5}
Data
D4
D3 D2
D1
/ISTAT
D0
Pin
88XX
-
- DEEM ERA_ -
-
-
OFF
-
Hi-Z
8DXX
-
-
-
-
-
-
ESP_ DUMB Hi-Z
ON
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