PD17P709A_15 Datasheet, PDF (9/38 Pages) Renesas Technology Corp – 4-BIT SINGLE-CHIP MICROCONTROLLER WITH DEDICATED HARDWARE FOR DIGITAL TUNING SYSTEM

µPD17P709A
BLOCK DIAGRAM
P0A0 to P0A3 4
P0B0 to P0B3 4
P0C0 to P0C3 4
P0D0 to P0D3 4
P1A0 to P1A3 4
P1B0 to P1B3 4
P1C0 (MD0)
to P1C3 (MD3) ⁴
P1D0 to P1D3 4
P2A0 to P2A2 3
P2B0 to P2B3 4
P2C0 (D0)
to P2C3 (D3) ⁴
P2D0 to P2D2 3
P3A0 to P3A3 4
P3B0 to P3B3 4
P3C0 to P3C3 4
P3D0 (D4)
to P3D3 (D7)
4
Ports
AD0/P0D0
AD1/P0D1
AD2/P0D2
AD3/P0D3
AD4/P1C2
AD5/P1C3
A/D
converter
PWM0/P1B0
PWM1/P1B1
PWM2/P1B2
D/A
converter
8-bit
timer 3
GND0 to GND2
Basic
timer
RF
RAM
1776 × 4 bits
SYSREG
PLL
Serial
interface 0
ALU
Instruction
decoder
Serial
interface 1
BEEP
Interrupt
control
One-time PROM
16384 × 16 bits
Frequency
counter
Program counter
Stack
CPU
Peripheral
8-bit
timer 0
gate
counter
8-bit
timer 1
8-bit
timer 2
OSC
Reset
VCPU
Regulator
Remark Pins in parentheses are used in PROM programming mode.
VCOH
VCOL
EO0
EO1
SO0/P0A0
SCK0/P0A1
SCL/P0A2
SDA/P0A3
SI0/P0B3
SCK1/P0B2
SO1/P0B1
SI1/P0B0
BEEP0/P1D0
BEEP1/P1D1
INT0
INT1
INT2
INT3/P1A2
INT4/P1A3
FCG0/P2A0
FCG1/P2A1
FMIFC/P1C0
AMIFC/P1C1
TM0G/P1A0
XIN
XOUT
CE
RESET
VDD0, VDD1
REG
Data Sheet U15723EJ1V0DS
7