PD17P709A_15 Datasheet, PDF (27/38 Pages) Renesas Technology Corp – 4-BIT SINGLE-CHIP MICROCONTROLLER WITH DEDICATED HARDWARE FOR DIGITAL TUNING SYSTEM

µPD17P709A
2.3 Program Memory Read Procedure
(1) Pull down unused pins to GND via a resistor. Set the CLK pin to low.
(2) Supply 5 V to the VDD pin. Set the VPP pin to low.
(3) Wait for 10 µs and then supply 5 V to the VPP pin.
(4) Set the mode setting pin to program memory address 0-clear mode.
(5) Supply +6 V to the VDD pin and +12.5 V to the VPP pin.
(6) Set the program inhibit mode.
(7) Set the verify mode. Addresses are incremented by one for each 4-pulse cycle input to the CLK pin.
(8) Set the program inhibit mode.
(9) Set the program memory address 0-clear mode.
(10) Change the VDD and VPP pins to 5 V.
(11) Turn off the power.
The following figure shows steps (2) to (9).
Reset
VDD + 1
VDD
VDD
GND
VPP
VPP
VDD
GND
CLK
D0 to D7
MD0
Hi - Z
Data output Data output
Hi - Z
MD1
“L”
MD2
MD3
Data Sheet U15723EJ1V0DS
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