PD17P709A_15 Datasheet, PDF (29/38 Pages) Renesas Technology Corp – 4-BIT SINGLE-CHIP MICROCONTROLLER WITH DEDICATED HARDWARE FOR DIGITAL TUNING SYSTEM

µPD17P709A
DC Characteristics (TA = –40 to +85°C, VDD = 3.5 to 5.5 V)
Parameter
Symbol
Conditions
MIN. TYP. MAX. Unit
Supply current
IDD1 When CPU is operating and PLL is stopped with
sine wave input to XIN pin.
(fIN = 4.5 MHz ±1%, VIN = VDD)
1.5 3.0 mA
IDD2 When CPU and PLL are stopped with sine-wave
input to XIN pin.
(fIN = 4.5 MHz ±1%, VIN = VDD)
With HALT instruction
0.7 1.5 mA
Data retention voltage
VDDR1 Crystal oscillation
3.5
5.5
V
VDDR2 Crystal oscillation Power failure detection by timer FF 2.2
5.5
V
VDDR3 stopped
Data memory retained
2.0
5.5
V
Data retention current
IDDR1 Crystal oscillation VDD = 5 V, TA = 25°C
2.0 4.0 µA
IDDR2 stopped
2.0 30.0 µA
Input voltage, high
VIH1 P0A0, P0B1, P0C0 to P0C3, P1A0, P1A1, P1C0 to
P1C3, P1D0 to P1D3, P2A2, P2B0 to P2B3,
P2C0 to P2C3, P2D0 to P2D2, P3A0 to P3A3,
P3B0 to P3B3, P3C0 to P3C3, P3D0 to P3D3
0.7VDD
VDD
V
VIH2 P0A1 to P0A3, P0B0, P0B2, P0B3, P2A0, P2A1, CE, 0.8VDD
INT0 to INT4, RESET
VDD
V
VIH3 P0D0 to P0D3
0.55VDD
VDD
V
Input voltage, low
VIL1 P0A0, P0B1, P0C0 to P0C3, P1A0, P1A1, P1C0 to
0
P1C3, P1D0 to P1D3, P2A2, P2B0 to P2B3,
P2C0 to P2C3, P2D0 to P2D2, P3A0 to P3A3,
P3B0 to P3B3, P3C0 to P3C3, P3D0 to P3D3
0.3VDD V
VIL2 P0A1 to P0A3, P0B0, P0B2, P0B3, P2A0, P2A1, CE,
0
INT0 to INT4, RESET
0.2VDD V
VIL3 P0D0 to P0D3
0
0.15VDD V
Output current, high
IOH1 P0A0 to P0A3, P0B0 to P0B3, P0C0 to P0C3,
–1.0
mA
P1D0 to P1D3, P2A0 to P2A2, P2B0 to P2B3,
P2C0 to P2C3, P2D0 to P2D2, P3A0 to P3A3,
P3B0 to P3B3, P3C0 to P3C3, P3D0 to P3D3
VOH = VDD – 1 V
IOH2 EO0, EO1
VDD = 4.5 to 5.5 V, VOH = VDD – 1 V –3.0
mA
Output current, low
IOL1 P0A0 to P0A3, P0B0 to P0B3, P0C0 to P0C3,
1.0
mA
P1D0 to P1D3, P2A0 to P2A2, P2B0 to P2B3,
P2C0 to P2C3, P2D0 to P2D2, P3A0 to PA3A,
P3B0 to P3B3, P3C0 to P3C3, P3D0 to P3D3
VOL = 1 V
IOL2
EO0, EO1
VDD = 4.5 to 5.5 V, VOL = 1 V 3.0
mA
IOL3 P1B0 to P1B3
VOL = 1 V 7.0
mA
Input current, high
IIH
P0D0 to P0D3 pulled down
VIN = VDD 5.0
150 µA
Output off leakage
ILO1 P1B0 to P1B3
VIN = 12 V
1.0 µA
current
ILO2
EO0, EO1
VIN = VDD, VIN = 0 V
±1.0 µA
Input leakage current,
high
ILIH
Input pin
VIN = VDD
1.0 µA
Input leakage current, low ILIL Input pin
VIN = 0 V
–1.0 µA
Data Sheet U15723EJ1V0DS
27