PD17P709A_15 Datasheet, PDF (22/38 Pages) Renesas Technology Corp – 4-BIT SINGLE-CHIP MICROCONTROLLER WITH DEDICATED HARDWARE FOR DIGITAL TUNING SYSTEM

µPD17P709A
Pin Name
Port pin P3A3 to P3A0
P3B3 to P3B0
P3C3 to P3C0
P3D3 to P3D0
Non-port CE
pins
EO1
EO0
INT0 to INT2
RESET
TEST
VCOH
VCOL
Table 1-1. Connections of Unused Pins
I/O Mode
Recommended Connection
(2/2)
I/O^{Note 2}
Set in general-purpose input port mode by software and
independently connect to VDD or GND via a resistor^{Note 1}.
Input
Output
Input
Input
–
Input
Connect to VDD via a resistor^{Note 1}.
Leave open.
Independently connect to GND via a resistor^{Note 1}.
Connect to VDD via a resistor^{Note 1}.
Directly connect to GND.
Disable PLL via software and leave open.
Notes 1. If a pin is externally pulled up (connected to VDD via a resistor) or pulled down (connected to GND
via a resistor) with a high resistance, the pin almost enters a high-impedance state, increasing the
current (through-current) consumption of the port. Generally, the resistance of a pull-up or pull-
down resistor is several 10 kΩ, although it depends on the application circuit.
2. The I/O ports are set in the general-purpose input port mode at power-on reset, when reset by the
RESET pin, or when reset by an overflow or underflow of the watchdog timer or the stack.
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Data Sheet U15723EJ1V0DS