PD17P709A_15 Datasheet, PDF (25/38 Pages) Renesas Technology Corp – 4-BIT SINGLE-CHIP MICROCONTROLLER WITH DEDICATED HARDWARE FOR DIGITAL TUNING SYSTEM

Figure 2-1. PA-17P709GC and PA-17KDZ
µPD17P709A
PA-17P709GC
PA-17KDZ
To PG-1500
2.1 Operation Modes for Program Memory Write, Read, and Verify
When +6 V is applied to the VDD pin and +12.5 V to the VPP pin, the µPD17P709A enters the program memory write,
read, and verify mode.
The following operation modes can be set by setting pins MD0 to MD3 as shown below.
Pins not listed in Table 2-2 should be connected to GND via a pull-down resistor (470 Ω) (refer to PIN
CONFIGURATION (2) PROM programming mode).
Table 2-2. Operation Mode Setting for Program Memory Write, Read, and Verify
Operation Mode Setting
VPP
VDD
MD0
MD1
+12.5 V +6 V
H
L
L
H
L
L
H
×
Remark ×: L or H
MD2
H
H
H
H
MD3
L
H
H
H
Operation Mode
Program memory address 0-clear mode
Write mode
Write/verify mode
Program inhibit mode
Data Sheet U15723EJ1V0DS
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