HD6473258P10V Datasheet, PDF (84/301 Pages) Renesas Technology Corp – Hitachi Single-Chip Microcomputer

4.3.6 Interrupt Response Time
Table 4-4 indicates the time that elapses from an interrupt request signal until the first instruction of
the software interrupt-handling routine is executed. Since the H8/325 Series accesses its on-chip
memory 16 bits at a time, very fast interrupt service can be obtained by placing interrupt-handling
routines in on-chip ROM and the stack in on-chip RAM.
Table 4-4. Number of States before Interrupt Service
No. Reason for wait
1
Interrupt priority decision
2
Wait for completion of
current instruction^*1
3
Save PC and CCR
4
Fetch vector
5
Fetch instruction
6
Internal processing
Total
Number of states
On-chip memory External memory
2^*3
2^*3
1 to 13
5 to 17^*2
4
2
4
4
17 to 29
12^*2
6^*2
12^*2
4
41 to 53^*2
Notes:
1. These values do not apply if the current instruction is an EEPMOV, MOVFPE, or
MOVTPE instruction.
2. If wait states are inserted in external memory access, these values may be longer.
3. 1 for internal interrupts.
4.4 Note on Stack Handling
In word access, the least significant bit of the address is always assumed to be 0. The stack is
always accessed by word access. Care should be taken to keep an even value in the stack pointer
(general register R7). Use the PUSH and POP (or MOV.W Rn, @–SP and MOV.W @SP+, Rn)
instructions to push and pop registers on the stack.
Setting the stack pointer to an odd value can cause programs to crash. Figure 4-7 shows an example
of damage caused when the stack pointer contains an odd address.
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