HD6473258P10V Datasheet, PDF (62/301 Pages) Renesas Technology Corp – Hitachi Single-Chip Microcomputer

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Op
EEPROM
Op
Notation
OP: Operation field
Figure 3-10. Block Data Transfer Instruction/EEPROM Write Operation Code
Notes on EEPMOV Instruction
Note 1
• The EEPMOV instruction is a block data transfer instruction. It moves the number of bytes
specified by R4L from the address specified by R5 to the address specified by R6.
R5 →
R5 + R4L →
← R6
← R6 + R4L
• When setting R4L and R6, make sure that the final destination address (R6 + R4L) does not
exceed H'FFFF. The value in R6 must not change from H'FFFF to H'0000 during execution of
the instruction.
R5 →
R5 + R4L →
H'FFFF
Not allowed
← R6
← R6 + R4L
Note 2
CPU will malfunction after EEPMOV instruction execution, in the following conditions.
EEPMOV instruction performs block data transfer function.
• Condition
When the following conditions are all true:
— The LSI is set to expanded mode (i.e. mode 1 or mode 2).
— The destination address of EEPMOV instruction is external area.
— At least one wait state is inserted to the last write bus cycle to the destination address by
EEPMOV instruction.
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