HD6473258P10V Datasheet, PDF (145/301 Pages) Renesas Technology Corp – Hitachi Single-Chip Microcomputer

Ø
Prescaler
output
FRC clock
pulse
FRC
N –1
N
N+1
Figure 7-4. Increment Timing for Internal Clock Source
(2) External Clock Input: Can be selected by the CKS1 and CKS0 bits in the TCR. The FRC
increments on the rising edge of the FTCI clock signal. The pulse width of the external clock signal
must be at least 1.5 system clock (Ø) cycles. The counter will not increment correctly if the pulse
width is shorter than this.
Figure 7-5 shows the increment timing. Figure 7-6 shows the minimum external clock pulse width.
Fig 7-4
Ø
FTCI
FRC clock pulse
FRC
N
N+1
Figure 7-5. Increment Timing for External Clock Source
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